In computer systems, for example, it is known to arrange a number of circuit components, for instance, memory components such as DRAMs (Dynamic Random Access Memories), on a common carrier substrate. Memory arrangements of this type are known, in particular, as “DIMMs” (Registered or Buffered Dual Inline Memory Module). The latter are typically fitted with 16 or 18 memory chips, which are clock-controlled when “SDRAMs” or “DDR DRAMs.”
In addition to memory components, a typical Dual Inline Memory Module (DIMM) includes, in particular, register circuits, buffer circuits, and synchronization circuits, such as “PLL” circuits. Circuits of this type are jointly associated with all the memory components on the module and are used, in particular, to amplify address signals, command signals, and clock signals, respectively, which are fed into the module, for example, by an external controller, for the purpose of controlling operation of the memory components. Register circuits and buffer circuits are used, in particular, to receive and amplify address signals or command signals. A (Phase Locked Loop PLL) circuit receives a clock signal (externally fed in) and generates, at its output, a corresponding phase-shifted clock signal, which serves to control clock-controlled memory components in the DIMM.
In the process of fabricating module arrangements of this type, it is customary to subject them to a quality control test during or after the fabrication process. In addition to checking the module's general functionality, an inspection to ascertain whether leakage currents or short circuit currents occur on individual connecting lines or connection pins, caused, for example, by short circuits between lines or between two connection pins is also conducted. However, for the register circuits, buffer circuits or PLL circuits connected upstream of the memory components, the inspection of the connecting lines and connection pins carrying control signals is limited. The reception circuits for receiving the respective control signals are used, in particular, to decouple the connecting lines between the respective reception circuit and the memory components on the module and the input lines of the reception circuits having the respective connection pins from one another. It has thus not been possible to satisfactorily inspect the electrical connections between the reception circuits and the memory components (carrying the abovementioned control signals) for leakage currents and short circuit currents.
Against this background, attempts have been made to conduct leakage tests for the purpose of detecting leakage currents in electrical connections or connection pins of this type with the aid of function tests, which test the functionality of the individual memory components. However, individual leakage currents and short circuits in electrical connections of this type can be measured only indirectly thereby and it is also possible to detect only those leakage currents and short circuits, respectively, which impair the functionality of the module and memory components, respectively. It has not been possible to detect leakage currents, which do not impair functionality but constitute a reliability problem (for example, degradation over time).